Astera Labs Hits an Inflection Point: Scorpio Set to Become Largest Product Line as Scale-Up Fabric Ramp Accelerates
Q1 2026 Earnings Call, May 5, 2026 — Revenue Surges 93% Year-Over-Year as PCIe Gen 6 and Switch Fabric Drive Broad-Based Growth
Scorpio Becomes the Story
Astera Labs reported first quarter 2026 revenue of $308.4 million, up 14% sequentially and 93% year-over-year, beating its own outlook on both the top and bottom lines. Non-GAAP EPS came in at $0.61 on a non-GAAP gross margin of 76.4%, up 70 basis points sequentially. The results were broad-based across signal conditioning and fabric switch portfolios, but the real signal for investors is what happens next: CFO Desmond Lynch, joining his first earnings call in the role, stated plainly that Scorpio is expected to become the company's largest product line by year-end — a remarkable trajectory for a product family that represented only 15% of total company revenue in 2025.
The Scorpio X-Series, targeting scale-up AI clustering, transitioned from preproduction to initial production volumes during Q1. Looking ahead, Astera guided Q2 revenue of $355 million to $365 million, up 15% to 18% sequentially, with non-GAAP EPS of $0.68 to $0.70. The primary engine is the continued ramp of Scorpio X-Series, with the newly announced 320-lane flagship expected to begin volume production in the second half of 2026. Lynch confirmed that X-Series revenue will eventually exceed P-Series revenue as the year progresses, with high-radix configurations layering in during the back half.
The 320-Lane Flagship: More Than a Port Count Upgrade
The most substantive new disclosure on the call was the expansion of the Scorpio product line. Astera announced its new Scorpio X-Series 320-lane switch, which the company describes as purpose-built to maximize AI economics through hardware-accelerated hypercast and in-network compute engines. CEO Jitendra Mohan was direct about the strategic rationale: "The newly introduced Scorpio X family… replaces multiple legacy switches to enable large scale-up cluster sizes in a single hop and reduces overall latency." Critically, in-network compute offloads accelerator-to-accelerator communication and computation directly onto the switch, which the company claims can boost collective operations by up to 2x — a material claim for customers running large-scale training and inference.
Initial shipments of the 320-lane Scorpio X are already underway, with production volumes ramping in the second half of 2026. Astera intends to demonstrate the product live at Computex, which management offered as a concrete near-term milestone for investors tracking the product's technical readiness. On the P-Series side, the portfolio now spans 32 to 320 lanes for diverse system topologies, and the company expects initial shipments to at least two additional major hyperscalers toward the end of 2026, with broader deployment in 2027.
President and COO Sanjay Gajendra framed ASP expectations without giving hard numbers, noting that larger switches command higher ASPs and that value is tied not just to lane count but to the feature set — in-network compute, hypercast, latency optimization — embedded in the silicon. The company's stated target of over $1,000 in silicon dollar content per accelerator within AI racks now appears increasingly achievable given the combined contribution of Scorpio X, Aries PCIe 6, and Taurus Ethernet AEC products across a single rack deployment.
Gross Margin Takes a Deliberate Hit in Q2
Investors should note that Q2 non-GAAP gross margin guidance of approximately 73% represents a meaningful step down from the 76.4% reported in Q1. Management was transparent about the cause: an estimated 200 basis point noncash impact related to a recently executed warrant agreement with one of Astera's customers. This is a deliberate commercial decision — likely tied to securing a significant customer commitment — but it is a headwind to near-term margin that the market will need to absorb. Operating expenses are also expected to increase, guided to $128 million to $131 million in Q2, reflecting continued R&D investment, a full quarter of the aiXscale Photonics acquisition, and the newly formed Israel Design Center.
Optical: A 2027 Revenue Story, With CPO Following in 2028
Astera provided its clearest roadmap to date on the optical transition. Gajendra outlined three distinct pillars: high-density detachable fiber-attached connectors leveraging aiXscale technology, with volume shipments beginning in 2027; chipsets supporting Near-Package Optics (NPO) for multi-rack AI clusters, also starting in 2027; and fully optically enabled Scorpio X switches with Co-Packaged Optics (CPO) supporting larger domains and higher egress densities, targeting mainstream deployment in 2028. The company is also engaging with customers on XPO, a newer pluggable standard, though Mohan noted that not all customers are currently planning to intercept that architecture.
The optical ambition is not just a technology announcement. Astera has been systematically building internal capabilities in advanced analog and mixed-signal design, DSP, electronic ICs, photonic ICs, and optical packaging over the past two years, and the aiXscale acquisition added both connector and photonic IC technology. Gajendra emphasized that supply chain commitments are being secured in parallel, acknowledging that the ability to ship to revenue — not just demonstrate technology — is a critical variable. Progress on the qualification process with a large AI platform provider for its ultra-high precision optical fiber coupler product remains ongoing, with volume shipments targeted for 2027.
Strategically, the switch platform gives Astera a natural insertion point for optical. As Mohan explained, "As a switch company, it gives us a perfect opportunity to deploy optical solutions… we will completely leverage and make sure that we support an end-to-end connectivity with our switches, including copper, NPO and CPO." This is a logical and defensible value chain extension, though execution risk remains meaningful given the complexity of photonic integration at scale.
NVLink Fusion and Custom Solutions: A 2027 Revenue Contributor in Development
Astera disclosed that it is in deep engagement on a custom silicon program to enable NVIDIA's NVLink Fusion architecture for hybrid rack deployments, developed in collaboration with NVIDIA and a hyperscaler customer. Gajendra described the program as progressing well at the silicon development level and expects it to begin contributing meaningful revenue in 2027. The application addresses a specific architectural need: allowing GPUs or XPUs using native protocols such as PCIe or UALink to interoperate with NVLink-based ecosystems, which is a real customer problem as AI infrastructure becomes increasingly heterogeneous.
Separately, a second custom CXL design win was disclosed during the quarter — a KV Cache offload application for a new hyperscaler customer. This follows the company's previously announced CXL program with Microsoft Azure for M-Series virtual machines, currently in private beta and expected to reach general availability by year-end. The KV Cache win involves a customized version of Astera's Leo CXL controller, with shipments expected in 2027. When pressed on dollar content sizing for this opportunity, Gajendra declined to provide specifics given that platform architectures are still being finalized, but noted that CXL controller ASPs are unlikely to be challenged relative to the cost of the memory they manage — an observation that implies pricing power is structurally intact in this segment.
UALink: Amazon and AMD Define the 2027 Intercept
Astera's UALink product roadmap received a clearer timeline on this call. Mohan noted that both Amazon and AMD have signaled their respective ASIC and GPU products incorporating UALink will launch in 2027, and Astera intends to be ready with a UALink switch at that intercept. The UALink 2.0 specification, published in early April by the UALink consortium, now defines in-network compute chiplets, manageability features, and 200-gigabit performance — a set of capabilities that aligns closely with what Astera is already building into its PCIe-based Scorpio X portfolio today. Mohan argued this convergence plays to Astera's strengths, and that the transition from PCIe to UALink should carry materially higher ASPs given increased device complexity, higher lane counts and radix, and the shift toward blended copper and NPO media configurations.
PCIe Gen 6 Momentum and Signal Conditioning Remain Durable
PCIe Gen 6 revenue across both AI fabric and signal conditioning exceeded one-third of total company revenue in Q1, and Astera has now shipped millions of PCIe Gen 6 ports to date. Aries, the company's signal conditioning product line, continues to benefit from strong early adoption of PCIe 6 for both scale-out and scale-up applications. Taurus delivered solid results driven by AEC adoption across GPU, XPU, and general-purpose compute systems. Q2 guidance calls for continued growth in both product lines, with Taurus growth driven by AI scale-out connectivity volume increases.
Looking further out, Aries will expand to support PCIe 7 and Taurus will extend into 1.6 terabit Ethernet, positioning the signal conditioning portfolio for continued relevance through the next connectivity upgrade cycle. Despite Scorpio's acceleration, Astera's CFO confirmed the expectation for strong continued Aries growth, noting the company intends to maintain and expand its leadership position in signal conditioning even as the center of gravity shifts toward fabric switching.
Supply Chain and Balance Sheet Hold Steady
Astera ended Q1 with $1.18 billion in cash, cash equivalents, and marketable securities, roughly flat versus Q4, as operating cash flow of $74.6 million was offset by acquisition-related payments. Inventory days came in at approximately 75 days, which management characterized as appropriate. Lynch acknowledged pockets of supply chain tightness that are industry-wide, but noted that Astera has diversified its back-end supply chain to manage through these constraints. The company expressed comfort with supply availability through the end of 2026 and indicated that supply conversations for 2027 are actively underway with manufacturing partners.
Astera Labs, Inc. Deep Dive
Business Model and Revenue Generation
Astera Labs is a pure-play fabless semiconductor company that engineers high-speed, mixed-signal connectivity solutions specifically tailored for cloud and artificial intelligence infrastructure. The foundational premise of the company's business model is simple but mechanically vital: as cloud providers network thousands of discrete processors to train and infer massive artificial intelligence models, the electrical signals traveling between these processors degrade rapidly. Astera Labs sells the critical silicon and hardware modules that clean, condition, and switch these signals, allowing data to move reliably at high speeds across complex server rack topologies. The company operates on a fabless model, outsourcing its physical silicon manufacturing while capturing the highly lucrative design and system-integration margins.
Astera segments its revenue across four primary product families, each built around industry-standard protocols such as Compute Express Link, Peripheral Component Interconnect Express, and Ethernet. The Aries product line consists of smart digital signal processing retimers that amplify and condition degraded signals over copper traces. The Scorpio line provides smart fabric switches, enabling intricate scale-up and scale-out network topologies among accelerators. The Taurus line features Ethernet smart cable modules for rack-to-rack connectivity, and the Leo line comprises memory connectivity controllers designed to mitigate memory bottlenecks by allowing different processors to pool and share memory. Monetization occurs directly through the sale of these physical chips and modules to cloud providers and original equipment manufacturers. However, the hardware is inextricably tied to the company's COSMOS software suite, a fleet management platform that provides real-time telemetry, predictive failure alerts, and link optimization. This software layer creates profound vendor lock-in; once a cloud provider integrates COSMOS to monitor thousands of critical server links, the friction of switching to a rival connectivity provider becomes exceptionally high. This tight hardware-software integration supports an elite margin profile, with Astera Labs generating non-GAAP gross margins exceeding 76 percent and non-GAAP operating margins above 36 percent as of the first quarter of fiscal 2026, resting on a $308.4 million quarterly revenue base that expanded 93 percent year-over-year.
Key Customers, Competitors, and Supply Chain
Astera Labs addresses a concentrated but immensely capitalized customer base consisting almost exclusively of tier-one hyperscale cloud providers and elite artificial intelligence accelerator designers. The true end customers driving volume are the dominant public clouds: Amazon Web Services, Microsoft Azure, Google Cloud, Meta, and Oracle. Astera's relationship with Amazon is particularly structural; in a highly unusual move for a semiconductor vendor, Astera issued 3.3 million warrants to Amazon tied to up to $6.5 billion in future product purchases. While this arrangement induces a minor non-cash dilution to gross margins as tranches vest, it secures a virtually unassailable multi-year volume commitment from the world's largest cloud infrastructure provider. Additionally, Astera works directly with leading artificial intelligence silicon vendors like Nvidia, Advanced Micro Devices, and Intel to ensure its retimers and switches are validated on their reference designs long before the hardware reaches the final hyperscale data center.
In the supply chain, Astera operates as a highly leveraged fabless entity, relying almost entirely on Taiwan Semiconductor Manufacturing Company for its leading-edge 5-nanometer and 3-nanometer silicon fabrication. The company utilizes a network of regional original design manufacturers in Taiwan and South Korea for the final assembly of its hardware board modules. By keeping its capital expenditures light, Astera channels its resources strictly into research and development.
The competitive landscape is bifurcated between specialized pure-play peers and massive incumbent semiconductor conglomerates. In the direct signal-conditioning and retimer market, Astera faces specialized firms such as Credo Semiconductor, Parade Technologies, Montage Technology, and Rambus. However, the overarching systemic competition comes from Broadcom and Marvell Technology. These two giants historically dominate the broader $20 billion data center switching and digital signal processing markets. While Broadcom and Marvell possess vastly superior scale, intellectual property portfolios, and balance sheets, Astera Labs has succeeded by maintaining a hyper-specialized focus on the precise bottlenecks of artificial intelligence accelerator connectivity, moving faster than incumbents to release standard-defining hardware.
Market Position and Competitive Advantages
Astera Labs occupies a dominant position within its specific niche, commanding an estimated 55 percent market share in the artificial intelligence accelerator connectivity and Peripheral Component Interconnect Express retimer segment. The company's primary competitive advantage is a pronounced first-mover dynamic in the adoption of next-generation connectivity standards. When the data center industry transitioned to Peripheral Component Interconnect Express 5.0, Astera was the first to achieve volume production with verified hyperscale interoperability. The company has repeated this feat in the current transition to Peripheral Component Interconnect Express 6.0; its Scorpio P-Series and Aries 6 products are presently the only Gen 6 fabric and retimer solutions shipping in true commercial volume as of early 2026. This chronological lead forces original equipment manufacturers and cloud providers to design their newest server architectures around Astera's silicon, as waiting for a competitor's chip would delay the deployment of multi-billion-dollar artificial intelligence clusters.
A secondary, deeply entrenched advantage is the aforementioned COSMOS software suite. In a massive computing cluster containing 100,000 graphics processing units, the failure of a single copper link can cause severe latency spikes or cluster-wide training interruptions. COSMOS acts as a diagnostic overlay, allowing data center operators to monitor the health and signal integrity of every Astera chip in the fleet in real time. Competitors attempting to unseat Astera must not only match the electrical performance of its silicon but also convince risk-averse data center operators to abandon a proven, fleet-wide telemetry system. This dual hardware-software moat provides Astera with substantial pricing power, shielding its gross margins from the commoditization typically seen in merchant silicon markets.
Industry Dynamics: Opportunities and Threats
The structural opportunity for Astera Labs is directly tethered to the scaling laws of modern artificial intelligence. As foundational models grow exponentially in parameter count, they require vastly larger clusters of accelerators to train efficiently. This shift from scale-up architectures within a single server to scale-out fabrics across an entire data hall inherently creates severe data transmission bottlenecks. The density of accelerators means that the physical distance between processors is increasing, forcing signals to travel over longer, more complex copper pathways. Consequently, the attachment rate of retimers is structurally expanding. A standard artificial intelligence server now requires between 4 and 12 retimers depending on the topology, driving connectivity spend per server from historical averages of 5 percent to nearly 15 percent today. The continued proliferation of open standards like Compute Express Link also provides an opportunity to attack the memory wall, where the compute capabilities of processors currently outpace the bandwidth of their attached memory.
Conversely, Astera Labs faces acute structural threats rooted in customer concentration and architectural shifts. Because a handful of hyperscalers dictate the vast majority of infrastructure capital expenditures, any cyclical digestion period or moderation in artificial intelligence spending by Amazon, Google, or Microsoft would immediately flow through to Astera's top line. Furthermore, Astera operates at the mercy of platform architectural decisions made by Nvidia and Advanced Micro Devices. If future accelerator generations employ drastically different topologies that require fewer retimer hops, or if merchant switch providers successfully bundle interconnects at subsidized rates to lock out third-party vendors, Astera's addressable market could compress rapidly.
New Products and Growth Drivers
Astera is currently executing two massive product ramps that will dictate its growth trajectory through the end of the decade. The most critical is the Scorpio X-Series, a massive 320-lane scale-up fabric switch that entered volume production in the first half of 2026. While the Aries line solved point-to-point signal degradation, the Scorpio switch allows data center operators to unify dozens of discrete accelerators into a single, seamless compute node. This product significantly increases Astera's dollar content per rack and elevates the company from a mere component supplier to a core fabric architect.
Simultaneously, the company is aggressively driving the commercialization of the Ultra Accelerator Link, an open industry standard designed for memory-semantic, scale-up connectivity. As a founding promoter and board member of the Ultra Accelerator Link consortium, Astera is positioning itself as the primary silicon provider for an open ecosystem designed to challenge proprietary interconnects like Nvidia's NVLink. By supplying purpose-built smart connectivity solutions to partners like Advanced Micro Devices and custom silicon hyperscalers, Astera opens up a vastly expanded total addressable market that stretches beyond standard Peripheral Component Interconnect Express and Ethernet domains. Additionally, the company's Leo Compute Express Link memory controllers are exiting private beta to achieve general availability within major public cloud virtual machine instances in late 2026, offering a third distinct vector for sustained revenue growth.
Disruptive Technologies and New Entrants
The most existential disruptive threat to Astera Labs' traditional business model is the physical limitation of copper interconnects and the accelerating transition toward silicon photonics. As signaling speeds push toward 224 gigabits per second and beyond, electrical signals over copper suffer from unsustainable power consumption and heat generation over anything but the shortest distances. The industry is rapidly advancing toward co-packaged optics and near-packaged optics, where data is converted into light directly at the processor package, entirely bypassing the need for electrical retimers on the motherboard. Well-funded internal hyperscale projects and optical specialists are continuously attempting to pull this optical transition forward, threatening to render copper-based signal conditioning obsolete in high-performance racks.
Rather than remaining defensive, Astera proactively neutralized this blind spot by acquiring the German deep-tech startup aiXscale Photonics in late 2025. This acquisition provided Astera with proprietary ultra-high-precision optical glass interposer technology, specifically designed for the efficient coupling of light between photonic integrated circuits and optical fibers in ultra-dense applications. By absorbing aiXscale's specialized optical input/output intellectual property, Astera has established a clear roadmap to deploy photonic scale-up solutions by 2027 and 2028. This strategic pivot ensures that as cloud architects debate the boundary between electrical and optical links, Astera possesses a complete portfolio to capture the revenue regardless of the physical transmission medium chosen by the customer.
Management Track Record
The executive leadership team, spearheaded by Chief Executive Officer Jitendra Mohan and Chief Operating Officer Sanjay Gajendra, has demonstrated a clinical ability to anticipate technological inflection points and execute flawlessly against hyperscale timelines. The founders originally left Texas Instruments in 2017 with a highly prescient thesis: that standard connectivity infrastructure would eventually choke the computing capabilities of specialized artificial intelligence hardware. By focusing solely on this impending bottleneck years before generative artificial intelligence became mainstream, management ensured Astera was perfectly positioned to capture the ensuing capital expenditure wave.
Since executing a highly successful initial public offering in early 2024, management's track record has been defined by unbroken operational consistency. The company has delivered consecutive top-line beats and raised forward guidance across every reported quarter of its public life, navigating the treacherous transition from early-stage hyper-growth to sustained volume production. Furthermore, leadership has proven financially disciplined. Instead of sacrificing profitability for market share, management leveraged the COSMOS software suite to maintain rigorous pricing power, transitioning the company from operating losses to massive non-GAAP profitability. The recent transition of early-stage financial leadership to new Chief Financial Officer Desmond Lynch, combined with the strategic acquisition of aiXscale Photonics, demonstrates a mature management team capable of evolving the company's infrastructure and intellectual property to sustain a multi-billion-dollar revenue scale.
The Scorecard
Astera Labs has engineered a fundamentally robust business model at the precise intersection of the most durable capital expenditure cycle in modern computing history. By securing a commanding market share in the niche of artificial intelligence signal conditioning and continuously matching the frantic upgrade cadence of hyperscale data centers, the company has erected significant barriers to entry against both pure-play upstarts and semiconductor titans. Its structural integration into the physical architecture of the dominant public clouds, fortified by a highly sticky software management overlay and unprecedented multi-billion-dollar vendor commitments, provides remarkable visibility into forward revenue generation. The flawless execution of consecutive product rollouts, transitioning from basic retimers to complex fabric switches, proves the organization possesses the engineering velocity required to maintain its premium pricing power.
However, the durability of this growth paradigm requires constant vigilance against both architectural shifts and optical disruption. While Astera's aggressive pivot into silicon photonics via targeted acquisitions mitigates the long-term threat of copper obsolescence, the ultimate test will be whether the company can defend its staggering margin profile as interconnect technologies commoditize and heavyweights like Broadcom exert bundling pressure. Assuming hyperscale artificial intelligence investments maintain their current trajectory and open-standard ecosystems like the Ultra Accelerator Link gain meaningful traction against proprietary alternatives, Astera Labs is uniquely equipped to compound its intrinsic value. The combination of pristine balance sheet management, dominant market share, and unmatched chronological leads in next-generation protocols solidifies its standing as an indispensable architect of modern computing infrastructure.