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Ayar Labs Discloses $650 Million Balance Sheet and 2028-2029 Revenue Ramp as Optical Interconnects Approach Volume Production

The Circuit podcast hosts CEO Mark Wade and VP of Capital Strategy Jesse Leiter for a rare deep dive into financing, manufacturing, and the path to an IPO

Ayar Labs, the closely watched optical interconnect startup that counts Nvidia, AMD, Intel and TSMC among its strategic investors, used a recent appearance on The Circuit podcast to lay out financial and technical details that have largely stayed behind closed doors. CEO Mark Wade and VP of Capital Strategy and Investor Relations Jesse Leiter disclosed that the company's balance sheet now stands at $650 million following a strategic investment from Wiwynn, and that a Reuters-reported secondary transaction has brought in additional institutional capital ahead of an eventual IPO. The conversation, hosted by Ben Bajarin and Jay Goldberg, is one of the most detailed public accountings yet of how a pre-revenue deep-tech optics company has built its cap table and is thinking about the public markets.

Capital Structure and the IPO Roadmap

The most concrete new information centers on financing. Leiter detailed a Series D round with strategic participation from Nvidia, AMD, Intel and TSMC, anchored by two institutional investors who led the round at what he called a deliberately conservative valuation. "We didn't want to have to grow into a very high valuation because we had execution risk ahead of us," Leiter said. That discipline paid off: twelve months later, with Jensen Huang laying out a co-packaged optics switch roadmap at GTC and sell-side analysts beginning to publish actively on CPO, Ayar Labs converted a Series E round led by long-only fund Neuberger Berman, with participation from sovereign wealth funds QIA and GIC, and crossover investors including Sequoia, Insight Partners and ARC. The Wiwynn investment, announced last week and pushing total capital to $650 million, extends the strategic register into rack-scale infrastructure, following earlier deals with GPU makers and foundry partners.

Both executives were explicit that the IPO timeline is tied to the company's revenue ramp rather than to market sentiment. Wade pointed to an "intercept" around 2028 or 2029, when he expects the optics-for-scale-up opportunity to move from qualification into real volume, arguing that visibility into supply commitments with leading customers gives the company unusually clear revenue forecasting for a pre-IPO hardware company. Leiter added that some investors have been explicit about playing a long game: "They want to hear what we're saying, what we're doing, what we're able to execute on, and see how that aligns with our timelines over time. It builds trust with the company and the management team so that they are at the IPO to support us."

The Core Bet: Photonics Has to Look Like CMOS

Wade framed Ayar Labs' entire strategy around a single wager made at the company's founding: that optical connectivity exiting a compute package only becomes commercially relevant once it can be manufactured through the same high-volume foundry and OSAT flow used for leading-edge CMOS. That is why the company builds exclusively in TSMC's COUPE process, using a three-nanometer electronic IC with hundreds of millions of transistors paired with a photonics wafer. "The higher-level bet was we have to make photonics look like CMOS leading-edge scale manufacturing," Wade said, pushing back on comparisons to alternative foundry partners such as Tower or GlobalFoundries by arguing that a photonics chip in isolation is nowhere near a finished product. The real product, in his framing, is the fully integrated advanced package — EIC, photonics die and optical connector assembled through a scalable post-foundry ecosystem — which is what actually plugs into GPUs, AI accelerators and switches at volume.

Why Manufacturing Is Harder Than It Looks

Wade spent considerable time explaining why the market has struggled to appreciate the manufacturing difficulty involved. Large multi-die, multi-reticle AI accelerator packages are already difficult and supply-constrained even without optics — the CoWoS shortages of the past two years are evidence of that. Ayar Labs is layering a new optical engine, and a new fiber-attach step, on top of that already-strained process. "Difficult on difficult makes it more difficult," Wade said, while noting that the industry's willingness to take on that complexity reflects how close existing electrical interconnects are to their physical bandwidth-distance limits. He was candid that the company is not immune to setbacks, framing progress as an inevitable cycle from difficult to solved to production-ready, and cautioning that financial audiences often expect weekly or monthly progress on problems that actually resolve on a quarterly or yearly cadence.

Why the Timing Finally Works

Asked why this technology is viable now and not five years ago, Wade traced the answer to market size rather than technical breakthroughs. Ayar Labs' founders have worked on integrated photonics since 2010, first at MIT and Berkeley, but earlier telecom and traditional datacom applications simply didn't generate enough connectivity-gated revenue to justify a CMOS-scale optics supply chain. He estimated that AI infrastructure represents "10 to 100 times" the volume telecom-era optics ever served, and credited the release of ChatGPT as the catalyst that made tier-one semiconductor and hyperscale ecosystems take the bottleneck seriously. Even so, he acknowledged that the advanced semiconductor supply chain "can't pivot on a dime," which explains the multi-year lag between ChatGPT's debut and optics reaching production volume.

Customer Adoption Path and Ecosystem Structure

Wade laid out a tiered customer and timeline structure that gives investors a clearer picture of how adoption will unfold. Leading GPU and AI accelerator makers — the strategic investors on Ayar Labs' cap table, including Nvidia, AMD and Intel — are expected to absorb the technology risk first, with meaningful deployment in 2028 and 2029. Broader adoption across the rest of the accelerator and custom silicon community, arriving through ASIC service partners such as MediaTek, Alchip and GUC, is expected to follow from 2029 through 2031, once the technology is essentially de-risked. "By the time they bring it in, it needs to be essentially zero risk, treated just like how they integrate HBM," Wade said, a comparison that signals how far optical I/O still has to go before it is treated as a commodity input rather than a novel component.

Market Sizing and the Skeptic's Question

On sizing, Wade argued the math is straightforward once unit volumes and realistic ASPs are applied to the scale-up opportunity, putting the addressable market at "tens of billions to approaching a hundred billion dollars." Bajarin separately cited third-party estimates of $30 billion to $50 billion by 2030 for the category. Notably, Wade used the conversation to highlight a shift in the sophistication of the investor base rather than to oversell the opportunity — he recounted a recent dinner with Jefferies where, for the first time in the U.S., he was asked detailed questions about test equipment vendors, wafer probers and test insertion strategy, which he took as evidence that public-market investors are now underwriting the technology risk rather than treating it as a black box.

The episode notably left out any discussion of the laser supply chain — an area Wade flagged as equally important to the company's differentiation and one both hosts said they intend to revisit in a future conversation.

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